Chinese Chipmakers Face Higher Costs as EUV Ban Forces Extra Exposure Steps

Chinese chipmakers are absorbing rising costs to work around export controls that keep ASML’s extreme ultraviolet lithography machines out of the country. Without access to those tools, firms like SMIC and CXMT depend on older deep ultraviolet equipment. This reliance forces engineers to expose critical chip layers multiple times to create advanced silicon. The process works, but it introduces more defects and lengthens production times. Experts speaking to Tom’s Hardware confirm that the financial burden grows with every additional exposure step required.

The gap in technology access remains the central hurdle for China’s semiconductor push. ASML is the sole manufacturer of EUV machines, which use 13.5nm wavelength light to print fine features on processors. Analysts estimate this technology gap places China five years or more behind Western rivals. Despite this disadvantage, domestic firms have achieved notable progress. A 2023 teardown of the Huawei Mate 60 Pro showed its Kirin 9000S processor was built by SMIC using a second-generation 7nm class process. Recent analysis of the Kirin 9030 suggests SMIC has moved its DUV based process closer to 5nm densities, though it still trails TSMC and Samsung.

The technique enabling this progress is known as multiple patterning. Instead of printing a complex layer in a single pass, manufacturers split the design into simpler patterns and build the layer step by step. Chris Mack, co-founder and CTO of Fractilia, notes that the industry once assumed three exposures on a 193 immersion tool cost the same as one EUV exposure. However, at four masks, EUV becomes the cheaper option. This shift in cost efficiency means Chinese foundries are paying a premium to achieve comparable density with older equipment.

Yield quality suffers under this method. Each new pattern must align precisely with previous etching, so more exposures increase accumulated overlay errors. Designers often add space around features to compensate, which enlarges the chip and reduces the number of dies per wafer. Since wafers cost tens of thousands of dollars, losing potential die is a direct financial hit. Mack emphasizes that manufacturers sell die, not wafers, making this loss particularly painful for the bottom line.

Memory chips illustrate the efficiency gap clearly. A June report from Morgan Stanley estimated that Chinese DRAM maker CXMT produces only about one-third as many bits per wafer as Western rivals. The bank described lithography access as a hard ceiling for Chinese memory development. Mack also warned that node labels like 5nm or 3nm have limited meaning on their own. SMIC’s N+3 process is a step forward but remains less scaled than established 5nm processes from Samsung and TSMC.

DUV technology still has room for improvement. Micron developed its 1-alpha DRAM without EUV by using multiple patterning and tight process control. Mack stated that Micron pushed 193nm technology farther than any other memory maker. Morgan Stanley believes CXMT’s planned move to 1-alpha DRAM for HBM3e is achievable without EUV. Douglas Fuller, a researcher at Copenhagen Business School, expects advanced packaging to allow firms to use DUV for the latest DRAM generations by the end of the decade.

Even Micron eventually adopted EUV for its 1-gamma DRAM. The company states this generation delivers more than 30% greater bit density per wafer than the previous 1-beta generation. EUV has its own drawbacks, such as stochastic effects that require higher exposure doses and greater costs. Mack said he would be hard pressed to believe a 3nm or 2nm node is economically viable without EUV. The technology offers clear advantages in density and cost at the most advanced levels.

Chinese chipmakers are not expected to stop. They can continue pushing DUV while accepting larger dies, poorer yields, or longer manufacturing times. They can also simply add capacity. Morgan Stanley assumes CXMT will stay on 1-alpha without EUV but still lift its share of global DRAM bit supply from 14% in 2026 to 16% in 2028. The bank expects China’s AI chip self-sufficiency to rise from 42% in 2025 to 70% by 2030, even as gaps in EUV, HBM, and advanced software persist.